Modulating Wave based Timing Calculation for a Multilevel 24-sided Polygonal Voltage Space Vector Structure with Similar Triangles
Artykuł w czasopiśmie
MNiSW
5
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| Status: | |
| Autorzy: | Surana Prashant, Majumder Mriganka Ghosh, Imthias Mohammed, Resalayyan Rakesh, Gopakumar Kumarukattan Nair, Umanand Loganathan, Zieliński Dariusz |
| Dyscypliny: | |
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| Rok wydania: | 2023 |
| Wersja dokumentu: | Drukowana | Elektroniczna |
| Język: | angielski |
| Numer czasopisma: | 1 |
| Wolumen/Tom: | 4 |
| Strony: | 219 - 227 |
| Bazy: | IEEE Xplore |
| Efekt badań statutowych | NIE |
| Materiał konferencyjny: | NIE |
| Publikacja OA: | NIE |
| Abstrakty: | angielski |
| This paper proposes a multilevel 24-sided polygonal voltage space vector structure (VSVS), eliminating lower-order harmonics up to 19th order and suppressing higher-order harmonics in motor phase voltage throughout the modulation range. Unlike switched average vectors in literature, the proposed scheme generates real active vectors that have the advantage of less switching frequency operation. The proposed VSVS consists of two concentric polygons divided into similar triangles resulting in a simple modulation algorithm. Instantaneous error in phase voltage reduces due to the multilevel property of the proposed VSVS. The proposed scheme extends the DC bus utilization and linear range of operation. The proposed scheme is implemented on an open-end winding induction motor (OEIM) fed with primary and secondary inverters from either end. This paper also presents a modulating wave-based method to compute nearest vector timings using sampled reference waves only. Unlike conventional methods, the proposed timing calculation method does not require trigonometric operations, sorting algorithms, and iterative search algorithms. Experimental verification of the proposed scheme is performed to validate the concept. Switching loss and Fourier analysis comparison with some existing schemes is also presented. |
